Magneto-resistive random-access memory (MRAM) is a non-volatile random-access memory technology in which data is stored by magnetic elements, as compared with more popular RAM and DRAM memory types that store data by electric charge or current flows. Each MRAM “cell” typically includes two ferromagnetic electrodes separated by a thin insulating layer, and a resistance to current passing through each MRAM cell depends on the relative directions (i.e., either parallel or anti-parallel) of the electrodes' magnetization. A conventional MRAM cell is read, for example, by measuring its electrical resistance (e.g., by measuring a current passed through the cell from a supply line to ground) while in the presence of an external field that orients one of the two ferroelectric electrodes. When the external field produces parallel alignment of the two electrodes, the MRAM cell exhibits a relatively low resistance. In contrast, when the external field produces anti-parallel alignment of the two electrodes, the MRAM cell exhibits a relatively high resistance.
The physical mechanism explaining the “switchable” resistance variation of MRAM cells is known as spin-polarized tunneling. The insulating layer is thin enough to allow electron tunneling from one ferromagnetic electrode to the other. The two ferromagnetic electrodes have different coercivity values, meaning that one of the ferromagnetic electrodes can be induced to switch its magnetization orientation from one direction to the other using a weaker external magnetic field than that required to switch the other ferromagnetic electrode. One of the ferroelectric electrodes acts as a reference by having a fixed magnetization, while the second one (i.e., the ferroelectric electrode with the smallest coercivity) can be switched by the external magnetic field or by the transfer of spin torque according to a data bit value (i.e., “1” or “0”) to be stored. The ferromagnetic electrode that includes the “switchable” ferroelectric layer is sometimes referred to as the cell's “storage layer”, and the other ferromagnetic electrode is known as a “reference layer”. When the magnetization orientations (directions) of the two ferromagnetic electrodes are parallel, the current through the tunnel dielectric (at the applied readout voltage, which is typically below 1V) is high (i.e., the MRAM cell is in a low resistance state). Conversely, when the magnetization vectors are anti-parallel, the current through the tunnel dielectric is low (i.e., the MRAM cell is in a high resistance state). The typical resistances of high and low states for an MRAM cell having a diameter of 200 nm and MgO thickness of 14 A are on the order of 2 kOhm and 1 kOhm, respectively. This corresponds to a tunnel magneto-resistance ratio (TMR), of approximately 100%.
In most MRAM cells, the reference layer (i.e., the ferroelectric electrode having fixed magnetization) includes a multilayered structure comprising a ferromagnetic material layer coupled to an anti-ferromagnetic (AF) structure. The AF structure comprises one or more AF materials that generate magnetic moments aligned at the microscale level on different sub-lattices while pointing in opposite directions, causing the total magnetic moment of the AF structure to be close to zero. Placing a ferroelectric layer close to the AF structure causes “pinning” (fixing) of the ferroelectric layer's magnetization direction due to the exchange interaction with the AF structure. However, this pinning effect is only generated while the AF structure is maintained below a corresponding blocking temperature Tb (i.e., a temperature, typically close to the Neel temperature of the AF material, above which the AF structure loses its ability to “pin” (or fix) the magnetization direction of an adjacent ferromagnetic layer). That is, when the temperature reaches the AF structure's blocking temperature Tb, the ferromagnetic layer is not pinned, and thus can be switched by relatively weak external magnetic fields, whereby data values may be written into the storage layer, and then subsequently “pinned” (i.e., fixed or frozen) by cooling the cell below the blocking temperature.
Writing data into MRAM cells typically involves applying external magnetic fields (e.g., created by the thick copper field line placed under the MRAM cells) that override the coercivity of the storage layer's ferromagnetic structure. In thermally-assisted switching (TAS, see U.S. Pat. No. 8,441,844, “Method for writing in a MRAM-based memory device with reduced power consumption”, Mourad El Baraji, Neal Berger), the writing process further includes heating the MRAM cells above the blocking temperature of the storage layers' AF structures (i.e., by forcing current pulses through the MRAM cells), thereby temporarily “switching-off” the AF structures' ability to pin the associated ferromagnetic layers, and allowing selective switching of the storage layers by way of currents applied through associated field lines. Subsequent cooling of the MRAM cells while maintaining the external magnetic fields causes the associated AF structures to again pin the storage layers in the desired “switched” direction.
U.S. Published Application 2012/0201073 (“Memory Devices with Series-Interconnected Magnetic Random Access Memory Cells”, Neal Berger, Mourad El Baraji) teaches the series connection of TAS MRAM cells to form a Magnetic Logic Unit (MLU) string similar to a NAND string, and using the MLU NAND string to perform what is now referred to as Match-in-Place™ (MiP) compare operations. The MRAM cells utilized in the disclosed MLU NAND string differ from “standard” MRAM cells in that the reference layers are replaced with free ferromagnetic layers having low coercivity, which are referred to as a “sense layers” (i.e., the AF structures that pin the ferromagnetic structure in the reference layers of standard MRAM cells are removed; see, e.g., Published Application 2011/0007561, “Self-reference magnetic random access cells”, Neal Berger, Jean-Pierre Nozieres). During write operations a logical pattern is written into the storage layers of the modified MRAM cells using the TAS approach described above. During subsequent match comparison (compare) operations, magnetization of the sense layers is controlled by external magnetic fields (e.g., created by the thick copper field line placed under the MRAM cell), which orient the sense layers according to an input logical pattern, and then the resulting total resistance of the MLU NAND string is measured by way of a read current passed through the string. This MLU NAND string approach facilitates several new functionalities, e.g., fabrication of security engines for user authentication, protecting again tampering attacks, etc. Another evident application of the MLU NAND string approach is content addressable memories-CAM (e.g., see U.S. Pat. No. 7,518,897, “System and method for providing content-addressable magnetoresistive random access memory cells”, Jean-Pierre Nozieres and Virgile Javerliac).
The above-mentioned use of conventional MLU NAND strings to perform Match-in-Place operations has several disadvantages. For example, in order to provide a reliable security engine, a MLU NAND string must include a large number of MRAM cells to ensure sufficient level of security (i.e., to prevent a hacker from easily replicating the stored confidential logical pattern by simply trying different data bit value combinations). With a typical single MRAM cell resistance of 2 kOhm, the total resistance of a 16 bit string is approximately 32 kOhm while distinguishing, e.g., of 30 kOhm vs 32 kOhm can be critical. To perform matching assignment one has to sense currents at the level of several microamperes. This is close to typical maximum sense amplifier sensitivity, and requires maintaining the compare for a significant amount of time in order to reliably conclude that matching of the stored and input logical pattern has occurred, where the necessary amount of time is at least in the order of at tens of hundreds of nanoseconds, which is considered a significantly long amount of time. In addition, during the matching comparison, currents on the order of several milliamperes must be forced through the field lines in order to generate the required external magnetic fields, resulting in significant power consumption, and also makes tampering attack much easier (i.e., sensing potentials at the field lines carrying high currents is much easier compared with the case of short low-current pulses).
What is needed is a logic unit for security engines or content addressable memory that facilitates high-speed match-in-place-type compare operations and avoids the long compare times and high current consumption associated with conventional MRAM-based MLU NAND strings.